Since its inception, SOI technology has gained popularity with IC designers, even though SOI is relatively new. The popularity of SOI technology results form its superior performance characteristics, such as its relatively high speeds of operation. Unfortunately, conventional SOI technology and ICs that include SOI circuitry suffer from several disadvantages.
First, such ICs fail to include an efficient way of providing a body contact for one or more SOI transistors in the IC. Transistors with conventional body contacts suffer from either relatively large size or lack of flexibility (e.g., they have a particular topology that the designer may not readily change).
Second, ICs with conventional SOI technology lack reliable, efficient ESD protection circuitry. Existing ESD protection circuitry either consume relatively large areas within the IC or suffer from reliability problems, such as electro-migration.
A need therefore exists for compact, efficient body contacts for SOI transistors. Furthermore, a need exists in the art for area-efficient, reliable ESD protection mechanism for ICs that include SOI transistors.